A simple solution to ensure that bus capacitance and rise times are healthy is to add I²C bus buffers throughout the system. Bus buffers break large busses into smaller I²C compliant pieces. This allows each bus segment to have their own 400 pF capacitance limit. Perhaps more importantly, this allows systems to have a higher total bus capacitance while staying I²C compliant. Bus buffers are autonomous devices that do not encode the data or clock lines. They simply disconnect and reconnect these lines, while always keeping both bus segments isolated. Since bus buffers have low input capacitances, they are ideally-suited for use on the card edge of hot-swap applications.

