MC74HC153A Datasheet by ON Semiconductor

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0N Semimnductor® @ Gunman” ‘HHHHHHH w HRH" 0 “HM“ |_||_||_||_|L_|L_IL_|L_|
© Semiconductor Components Industries, LLC, 2013
May, 2013 Rev. 1
1Publication Order Number:
MC74HC153A/D
MC74HC153A
Dual 4-Input Data
Selector/Multiplexer
HighPerformance SiliconGate CMOS
The MC74HC153 is identical in pinout to the LS153. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
The Address Inputs select one of four Data Inputs from each
multiplexer. Each multiplexer has an activelow Strobe control and a
noninverting output.
The HC153 is similar in function to the HC253, which has 3state
outputs.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
These are PbFree Devices
Figure 1. Logic Diagram
1
6
5
4
3
14
A0
7
9
Ya
Yb
D0a
STROBE a
ADDRESS
INPUTS
DATA-
WORD a
INPUTS
PIN 16 = VCC
PIN 8 = GND
A1 2
10
11
12
13
15
STROBE b
D1a
D2a
D3a
D0b
DATA-
WORD b
INPUTS
D1b
D2b
D3b
http://onsemi.com
MARKING
DIAGRAMS
SOIC16
D SUFFIX
CASE 751B
TSSOP16
DT SUFFIX
CASE 948F
1
16
1
16
HC153AG
AWLYWW
HC
153A
ALYWG
G
1
16
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G= PbFree Package
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
(Note: Microdot may be in either location)
PIN ASSIGNMENT
1
16
FUNCTION TABLE
D0, D1, D2, and D3 = the level of the respective
data input.
Inputs Output
A1 A0 Strobe Y
XXHL
LLLD0
LHLD1
HLLD2
HHLD3
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
STROBE a
D3a
A1
GND
D3b
A0
STROBE b
VCC
D2a
D1a
D0a
Ya
D2b
D1b
D0b
Yb
MC74HC153A
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2
MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC DC Supply Voltage (Referenced to GND) 0.5 to + 7.0 V
Vin DC Input Voltage (Referenced to GND) 1.5 to VCC + 1.5 V
Vout DC Output Voltage (Referenced to GND) 0.5 to VCC + 0.5 V
Iin DC Input Current, per Pin ±20 mA
Iout DC Output Current, per Pin ±25 mA
ICC DC Supply Current, VCC and GND Pins ±50 mA
PDPower Dissipation in Still Air SOIC Package
TSSOP Package
500
TBD
mW
Tstg Storage Temperature 65 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect device
reliability.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC DC Supply Voltage (Referenced to GND) 2.0 6.0 V
Vin, Vout DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V
TAOperating Temperature, All Package Types 55 +125 °C
tr, tfInput Rise and Fall Time VCC = 2.0 V
(Figure 2) VCC = 4.5 V
VCC = 6.0 V
0
0
0
1000
500
400
ns
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol Parameter Test Conditions
VCC
V
Guaranteed Limit
Unit
55 to
25°Cv 85°Cv 125°C
VIH Minimum HighLevel Input
Voltage
Vout = 0.1 V or VCC 0.1 V
|Iout| v 20 mA
2.0
4.5
6.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
VIL Maximum LowLevel Input
Voltage
Vout = 0.1 V or VCC 0.1 V
|Iout| v 20 mA
2.0
4.5
6.0
0.3
0.9
1.2
0.3
0.9
1.2
0.3
0.9
1.2
V
VOH Minimum HighLevel Output
Voltage
Vin = VIH or VIL
|Iout| v 20 mA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
Vin = VIH or VIL |Iout| v 4.0 mA
|Iout| v 5.2 mA
4.5
6.0
3.98
5.48
3.84
5.34
3.70
5.20
VOL Maximum LowLevel Output
Voltage
Vin = VIH or VIL
|Iout| v 20 mA
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
Vin = VIH or VIL |Iout| v 4.0 mA
|Iout| v 5.2 mA
4.5
6.0
0.26
0.26
0.33
0.33
0.40
0.40
Iin Maximum Input Leakage Current Vin = VCC or GND 6.0 ±0.1 ±1.0 ±1.0 mA
ICC Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Iout = 0 mA
6.0 8 80 160 mA
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
MC74HC153A
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3
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol Parameter
VCC
V
Guaranteed Limit
Unit
55 to
25°Cv 85°Cv 125°C
tPLH,
tPHL
Maximum Propagation Delay, Input D to Output Y
(Figures 2 and 5)
2.0
4.5
6.0
140
28
24
175
35
30
210
42
36
ns
tPLH,
tPHL
Maximum Propagation Delay, Input A to Output Y
(Figures 3 and 5)
2.0
4.5
6.0
175
35
30
220
44
37
265
53
45
ns
tPLH,
tPHL
Maximum Propagation Delay, Strobe to Output Y
(Figures 4 and 5)
2.0
4.5
6.0
95
19
16
120
24
20
145
29
25
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 2 and 5)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
Cin Maximum Input Capacitance — 10 10 10 pF
CPD Power Dissipation Capacitance (Per Multiplexer)
Typical @ 25°C, VCC = 5.0 V
pF
31
SWITCHING WAVEFORMS
Figure 2. Figure 3.
tr
tf
tPHL
tPLH
tTHL
tTLH
STROBE 10%
50%
VCC
GND
tf
tr
INPUT D
OUTPUT Y
10%
50%
90%
10%
50%
90%
tTLH
tPLH tPHL
tTHL
VCC
GND
VCC
GND
50%
INPUT A
tPLH tPHL
50%
OUTPUT Y
10%
50%
90%
90%
OUTPUT Y
*Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 4. Figure 5. Test Circuit
VALIDVALID
MC74HC153A
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4
PIN DESCRIPTIONS
DATA INPUTS
D0a D3a, D0b D3b (Pins 3, 4, 5, 6, 10, 11, 12, 13)
Data Inputs. With the outputs enabled, the addressed Data
Inputs appear at the Y outputs.
CONTROL INPUTS
A0, A1 (Pins 2, 14)
Address Inputs. These inputs address the pair of Data
Inputs which appear at the corresponding outputs.
Strobe (Pins 1, 15)
Activelow Strobe. A low level applied to these pins
enables the corresponding outputs.
OUTPUTS
Ya, Yb (Pins 7, 9)
Noninverting data outputs.
1
DATA
WORD a
INPUTS
ADDRESS
INPUTS
Figure 6. Expanded Logic Diagram
DATA
WORD b
INPUTS
NONINVERTIN
G
DATA
OUTPUTS
6
5
4
3
14
A0
7
9
Ya
Yb
D0a
STROBE a
A1
10
11
12
13 15
STROBE b
D1a
D2a
D3a
D0b
D1b
D2b
D3b
2
ORDERING INFORMATION
Device Package Shipping
MC74HC153ADG SOIC16
(PbFree)
48 Units / Rail
MC74HC153ADR2G SOIC16
(PbFree)
2500 Tape & Reel
MC74HC153ADTR2G TSSOP16* 2500 Tape & Reel
MC74HC153ADTG TSSOP16* 96 Units / Tube
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently PbFree.
0N Semiwndudw" 7—\ ® ‘EI’H’FI’H’H’H’H’FI 7’ o MAXIMUM MOLD Pnomusm n ‘5 mm PER 5on pm 5 mMENsmMDmEsNovmcwnEnAMaAR nnmnuaon AuowABLEnAMaARmomusuoN ; <19 0-25(0.01m®="" b©="" swanmawamwnmammal)="" (e="" h="" h="" h="" eli;="" mmensmm="" n="" maxqu="" mgnwcouomow="" ”j="" g="" t17="" jfl="" a’h“="" rx45’/="" i-eiee="" t="" mmuuuuuufl="" aka="" emma="" dvd="" on="" samaanuuamn="" and="" are="" mademavks="" av="" semxcanduclur="" cnmpunenls="" lndusmes="" llc="" dba="" on="" semxcanduclar="" ar="" us="" suhsxdxanes="" m="" xna="" umled="" sxaxaa="" andjm="" mhev="" commas="" on="" semxcunduclar="" vesewes="" ma="" th|="" to="" make="" changes="" wuhum="" yunhev="" nauaa="" to="" any="" pruduns="" nanan="" on="" semanduc‘nv="" makes="" m7="" wanamy="" represenlalmn="" m="" guarantee="" regardmg="" ma="" sumahmy="" at="" w;="" manuals="" can="" any="" pamcu‘av="" purpase="" nnv="" dues="" on="" semumnduclm="" assume="" any="" mammy="" ansmg="" mac="" xna="" apphcahan="" m="" use="" no="" any="" pmduclnv="" mum="" and="" saaamcauy="" dwsc‘axms="" any="" and="" au="" mammy="" mcmdmg="" wnnam="" nnmauan="" spema‘="" cansequenha‘="" m="" \nmdenla‘="" damages="" on="" sannmnauaxar="" dues="" nn|="" aanyay="" any="" hcense="" under="" na="" pa|em="" nghls="" nar="" xna="" ngma="" av="" n|hers="">
SOIC16
CASE 751B05
ISSUE K
DATE 29 DEC 2006
SCALE 1:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
18
16 9
SEATING
PLANE
F
J
M
RX 45_
G
8 PLP
B
A
M
0.25 (0.010) B S
T
D
K
C
16 PL
S
B
M
0.25 (0.010) A S
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A9.80 10.00 0.386 0.393
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.229 0.244
R0.25 0.50 0.010 0.019
____
6.40
16X
0.58
16X 1.12
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
STYLE 1:
PIN 1. COLLECTOR
2. BASE
3. EMITTER
4. NO CONNECTION
5. EMITTER
6. BASE
7. COLLECTOR
8. COLLECTOR
9. BASE
10. EMITTER
11. NO CONNECTION
12. EMITTER
13. BASE
14. COLLECTOR
15. EMITTER
16. COLLECTOR
STYLE 2:
PIN 1. CATHODE
2. ANODE
3. NO CONNECTION
4. CATHODE
5. CATHODE
6. NO CONNECTION
7. ANODE
8. CATHODE
9. CATHODE
10. ANODE
11. NO CONNECTION
12. CATHODE
13. CATHODE
14. NO CONNECTION
15. ANODE
16. CATHODE
STYLE 3:
PIN 1. COLLECTOR, DYE #1
2. BASE, #1
3. EMITTER, #1
4. COLLECTOR, #1
5. COLLECTOR, #2
6. BASE, #2
7. EMITTER, #2
8. COLLECTOR, #2
9. COLLECTOR, #3
10. BASE, #3
11. EMITTER, #3
12. COLLECTOR, #3
13. COLLECTOR, #4
14. BASE, #4
15. EMITTER, #4
16. COLLECTOR, #4
STYLE 4:
PIN 1. COLLECTOR, DYE #1
2. COLLECTOR, #1
3. COLLECTOR, #2
4. COLLECTOR, #2
5. COLLECTOR, #3
6. COLLECTOR, #3
7. COLLECTOR, #4
8. COLLECTOR, #4
9. BASE, #4
10. EMITTER, #4
11. BASE, #3
12. EMITTER, #3
13. BASE, #2
14. EMITTER, #2
15. BASE, #1
16. EMITTER, #1
STYLE 5:
PIN 1. DRAIN, DYE #1
2. DRAIN, #1
3. DRAIN, #2
4. DRAIN, #2
5. DRAIN, #3
6. DRAIN, #3
7. DRAIN, #4
8. DRAIN, #4
9. GATE, #4
10. SOURCE, #4
11. GATE, #3
12. SOURCE, #3
13. GATE, #2
14. SOURCE, #2
15. GATE, #1
16. SOURCE, #1
STYLE 6:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
7. CATHODE
8. CATHODE
9. ANODE
10. ANODE
11. ANODE
12. ANODE
13. ANODE
14. ANODE
15. ANODE
16. ANODE
STYLE 7:
PIN 1. SOURCE N‐CH
2. COMMON DRAIN (OUTPUT)
3. COMMON DRAIN (OUTPUT)
4. GATE P‐CH
5. COMMON DRAIN (OUTPUT)
6. COMMON DRAIN (OUTPUT)
7. COMMON DRAIN (OUTPUT)
8. SOURCE P‐CH
9. SOURCE P‐CH
10. COMMON DRAIN (OUTPUT)
11. COMMON DRAIN (OUTPUT)
12. COMMON DRAIN (OUTPUT)
13. GATE N‐CH
14. COMMON DRAIN (OUTPUT)
15. COMMON DRAIN (OUTPUT)
16. SOURCE N‐CH
16
89
8X
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98ASB42566B
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
SOIC16
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
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TSSOP16
CASE 948F01
ISSUE B
DATE 19 OCT 2006
SCALE 2:1
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A4.90 5.10 0.193 0.200
B4.30 4.50 0.169 0.177
C−−− 1.20 −−− 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.18 0.28 0.007 0.011
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE W.
____
SECTION NN
SEATING
PLANE
IDENT.
PIN 1
18
16 9
DETAIL E
J
J1
B
C
D
A
K
K1
H
G
DETAIL E
F
M
L
2X L/2
U
S
U0.15 (0.006) T
S
U0.15 (0.006) T
S
U
M
0.10 (0.004) V S
T
0.10 (0.004)
T
V
W
0.25 (0.010)
16X REFK
N
N
1
16
GENERIC
MARKING DIAGRAM*
XXXX
XXXX
ALYW
1
16
*This information is generic. Please refer to
device data sheet for actual part marking.
PbFree indicator, “G” or microdot “ G”,
may or may not be present.
XXXX = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G or G= PbFree Package
7.06
16X
0.36 16X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98ASH70247A
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
TSSOP16
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a a e lrademavks av Semxcunduclm Cnmvnnems In "sine \ghlsmanumhernlpalems \rademavks Dav www menu cumrsuerguwaxem Mavkmg gm 9 www nnserm cum
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1
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IC MULTIPLEXER 2 X 4:1 16SOIC
IC MULTIPLEXER 2 X 4:1 16TSSOP
IC MULTIPLEXER 2 X 4:1 16SOIC
IC MULTIPLEXER 2 X 4:1 16SOIC
IC MULTIPLEXER 2 X 4:1 16TSSOP
IC MULTIPLEXER 2 X 4:1 16SOIC
IC MULTIPLEXER 2 X 4:1 16TSSOP