LT1684 Datasheet by Analog Devices Inc.

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1
LT1684
Micropower
Ring Tone Generator
Allows Dynamic Control of Output Frequency,
Cadence, Amplitude and DC Offset
Active Tracking Supply Configuration Allows Linear
Generation of Ring Tone Signal
No High Voltage Post-Filtering Required
Capacitive Isolation Eliminates Optocouplers
Low Distortion Output Meets International
PTT Requirements
Differential Input Signal for Noise Immunity
User Adjustable Active Output Current Limit
Powered Directly From High Voltage Ringer
Supply—No Additional Supplies Necessary
Supply Current: <1mA
2% Signal Amplitude Reference
Available in 14-Pin SO and DIP Packages
The LT
®
1684 is a telecommunication ring tone generator.
The IC takes a user-generated pulse width modulated
(PWM) input and converts it to a high voltage sine wave
suitable for telephone ringing applications.
The LT1684 receives capacitor-isolated differential PWM
input signals encoded with desired ring output cadence,
frequency, and amplitude information. The LT1684 nor-
malizes the pulse amplitude to ±1.25V for an accurate
signal voltage reference. The cadence, frequency and
amplitude information is extracted using a multiple-
pole active filter/amplifier, producing the output ring tone
signal.
The LT1684 uses its own ring tone output as a reference
for generating local supply rails using complementary
high voltage external MOSFETs as dynamic level-shifting
devices. This “active tracking” supply mode of operation
allows linear generation of the high voltage ring tone
signal, reducing the need for large high voltage filtering
elements.
Wireless Local Loop Telephones
Key System/PBX Equipment
Fiber to the Curb Telecom Equipment
IN A GATE+
IN B
6.8nF
IRF9610
IRF610
100k
V+
P1
µC
P2
LIM+
OUT
BGOUT
ATREF
COMP1
COMP2
AMPIN LIM
V
GATE
100pF
1N4001
20pF
100pF
100pF
DC
ISOLATION
PWM
CONTROLLER
100
10k
10k
1N5817
0.1µF
1µF
3k
5k
2k
300k
6.8nF 100k
100
RING TONE
OUTPUT ±100mA
CAPABILITY
100V
+
–100V
LT1684
4700pF
1684 TA01
FB1
()
FB1: FERRONICS FMB1601 (716) 388-1020
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
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, LTC and LT are registered trademarks of Linear Technology Corporation.
Electrically Isolated Ring Tone Generator
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LT1684
Voltages:
Active Tracking Differential Voltage
(GATE
+
– GATE
)..................................0.3V to 42V
Local Supply Differential Voltage
(V
+
– V
)...............................................0.3V to 36V
Local Supply
Voltage V
+..............
(GATE
+
– 7.0V) to (GATE
+
+ 0.3V)
Local Supply
Voltage V
..............
(GATE
– 0.3V) to (GATE
+ 7.0V)
PWM Input Differential Voltage
(IN A – IN B).........................................7.0V to 7.0V
PWM Input Voltage
Common Mode................. (V
– 0.3V) to (V
+
+ 0.3V)
LIM
+
Current Limit
Pin Voltage ..................... (OUT – 0.3V) to (V
+
+ 0.3V)
LIM
Current Limit
Pin Voltage .................... (V
– 0.3V) to (OUT + 0.3V)
All Other Pin Voltages ........... (V
– 0.3V) to (V
+
+ 0.3V)
Currents:
LIM
+
, LIM
Current.......................................... 350mA
OUT Current ....................................................... 350mA
BG
OUT
Current .................................................... ±10mA
PWM (IN A, IN B) Current .................................... ±5mA
GATE
+
, GATE
Current ....................................... ±20mA
COMP1 Current .................................................... ±1mA
COMP2 Current .................................................... ±1mA
AT
REF
Current ..................................................... ±20mA
Temperatures:
Operating Junction Temperature Range
Commercial Grade................................. 0°C to 125°C
Industrial Grade................................ 40°C to 125°C
Storage Temperature Range ................. 65°C to 150°C
Lead Temperature (Soldering, 10 sec)..................300°C
(Note 1)
1
2
3
4
5
6
7
TOP VIEW
N PACKAGE
14-LEAD PDIP S PACKAGE
14-LEAD PLASTIC SO
14
13
12
11
10
9
8
IN B
COMP1
COMP2
LIM
V
GATE
AT
REF
IN A
BG
OUT
AMPIN
GATE
+
V
+
LIM
+
OUT
ORDER PART
NUMBER
LT1684CN
LT1684CS
LT1684IN
LT1684IS
T
JMAX
= 125°C, θ
JA
= 75°C/W (N)
T
JMAX
= 125°C, θ
JA
= 115°C/W (S)
Consult factory for Military grade parts.
ABSOLUTE AXI U RATI GS
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PACKAGE/ORDER I FOR ATIO
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LT1684
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: IC Supply current specification represents unloaded condition and
does not include external FET gate pull up/down currents (GATE
+
, GATE
pins). Actual total IC bias currents will be higher and vary with operating
conditions. See Applications Information.
Note 3: PWM inputs are high impedance through ±100mV beyond the
input thresholds.
Note 4: 10k resistor from pin AMPIN to ground.
Note 5: Guaranteed but not tested.
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
V+ – V = 20V, Voltages referenced to pin OUT, VOUT = VATREF unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply and Protection
I
S
DC Supply Current (Note 2) IN A – IN B 1.6V 680 950 µA
|V
+
| Local Supply Voltages V
GATE
+ V
+
6.5 10 V
|V
|V
GATE
V
V
GATE
+ Active Tracking Supply FET I
GATE
+ = –100µA, 13.2 14.0 14.8 V
Bias Voltage AT
REF
= 0V
V
GATE
Active Tracking Supply FET I
GATE
– = 100µA, –14.8 –14.0 –13.2 V
Bias Voltage AT
REF
= 0V
PWM Receiver
f
PWM
Input Carrier Frequency 10 kHz
V
IN
Minimum Valid Differential Input IN A – IN B or IN B – IN A 1.6 V
Differential Input Threshold 0.50 0.70 1.00 V
| IN A – IN B |
R
IN
Differential Input Overdrive Impedance V
IN
> V
TH
+ 100mV 710 k
(Note 3, 5)
R
INA,INB
Single-Ended Input Impedance To Pin OUT 50 k
(Note 5)
BG Buffer
V
BGOUT
BG
OUT
Normalized Voltage Magnitude |V
BGOUT
| 1.235 1.250 1.265 V
1.225 1.250 1.275 V
V
BGOUTOS
Output Offset Voltage –7 7 mV
[(V
BGOUT
+) + (V
BGOUT
–)]/2 –10 10 mV
I
BGOUTSC
BG
OUT
Short-Circuit Current ±2±4.5 mA
R
BGOUT
BG
OUT
Output Impedance 2mA I
BGOUT
2mA 0.2
t
r
BG
OUT
Rise Time (10% to 90%) R
OUT
= 5k, C
OUT
= 10pF 160 300 ns
t
f
BG
OUT
Fall Time (10% to 90%) R
OUT
= 5k, C
OUT
= 10pF 260 400 ns
t
r-f
BG
OUT
RiseTime – Fall Time 200 –100 0 ns
t
pr
BG
OUT
Propagation Delay PWM Input R
OUT
= 5k, C
OUT
= 10pF 340 500 ns
Transition to 10% Output (Rising Edge)
t
pf
BG
OUT
Propagation Delay PWM Input R
OUT
= 5k, C
OUT
= 10pF 440 600 ns
Transition to 90% Output (Falling Edge)
t
p
BG
OUT
Propagation Delay 200 –100 100 ns
Rising Edge – Falling Edge
Output Amplifier
V
OUTOS
OUT Offset Voltage V
AMPIN
= 0v, I
OUT
= 0A 6 6 mV
R
AMPIN
= 10k (Note 4) –8 8 mV
R
OUT
OUT Output Impedance –10mA I
LIM
+ –100mA, LIM
+
Shorted to OUT 0.01
10mA I
OUT
100mA, LIM
Shorted to V
0.15
I
OUTSC
OUT Short-Circuit Current LIM
+
Shorted to OUT ±100 ±190 mA
LIM
Shorted to V
ELECTRICAL CHARACTERISTICS
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LT1684
DC Supply Current vs V+ – VDC Supply Current vs Temperature VGATE – VATREF Voltage
Magnitudes vs IGATE
V
+
– V
(V)
14 16 18 20 22 24
DC SUPPLY CURRENT (µA)
1684 G01
740
720
700
680
660
640
620
600
IN A – IN B 1.6V
IN A – IN B –1.6V
T
J
= 25°C
TEMPERATURE (°C)
50 25 0 25 50 75 100 125
DC SUPPLY CURRENT (µA)
1684 G02
710
690
670
650
630
610
590
570
550
IN A – IN B 1.6V
IN A – IN B –1.6V
I
GATE
(mA)
0.1 0.3 1.0 3.0 10.0
V
GATE
– V
ATREF
(V)
1684 G03
14.3
14.2
14.1
14.0
13.9
13.8
T
J
= 25°C
VGATE – VATREF Voltage
Magnitudes vs Temperature PWM Input Thresholds vs
Temperature VBGOUT Magnitude vs Temperature
TEMPERATURE (°C)
V
GATE
– V
ATREF
(V)
1684 G04
14.5
14.4
14.3
14.2
14.1
14.0
13.9
13.8
13.7
13.6
13.5
50 25 0 25 50 75 100 125
I
GATE
= 1mA
TEMPERATURE (°C)
50 25 0 25 50 75 100 125
IN A – IN B (V)
1684 G05
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
TEMPERATURE (°C)
50 25 0 25 50 75 100 125
V
BGOUT
(V)
1684 G06
1.253
1.252
1.251
1.250
1.249
1.248
1.247
1.246
1.245
PWM Buffer (Pin BGOUT) Current
Limit vs Temperature Output Amplifier Current Limit vs
Temperature (RLIM = 0)Output Amplifier Current Limit vs
External Limiting Resistor Values
TEMPERATURE (°C)
50 25 0 25 50 75 100 125
PWM BUFFER CURRENT LIMIT (mA)
1684 G07
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
TEMPERATURE (°C)
OUTPUT CURRENT LIMIT (mA)
1684 G08
250
225
200
175
150
125
100
50 25 0 25 50 75 100 125
R
LIM
()
0 21 4 6 83 5 7 910
OUTPUT CURRENT LIMIT (mA)
1684 G09
200
150
100
50
0
TYPICAL (T
J
= 25°C)
MINIMUM (T
J
= 125°C)
TYPICAL PERFOR A CE CHARACTERISTICS
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LT1684
IN B (Pin 1): PWM Negative Input. Input is isolated from
digital source by ~100pF series capacitor. A 10k resistor
can be connected to the IN B pin in series with the isolation
capacitor for transient protection. The PWM receiver imple-
ments a diode forward drop of input hysteresis (relative to
IN A). This hysteresis and internal signal limiting assure
common mode glitch rejection with isolation capacitor
mismatches up to 2:1. For maximum performance, how-
ever, effort should be made to match the two PWM input
isolation capacitors. Pin IN B is differentially clamped to
pin IN A through back-to-back diodes. This results in a
high impedance differential input through ±100mV be-
yond the input thresholds. 5k internal input resistors yield
a 10k (nominal) differential overdrive impedance.
COMP1 (Pin 2): Output Amplifier Primary Compensation.
Connect a 100pF capacitor from pin COMP1 to pin OUT.
COMP2 (Pin 3): Output Amplifier Secondary Compensa-
tion. Connect a 20pF capacitor from pin COMP2 to pin
OUT.
LIM
(Pin 4): Output Amplifier Current Sink Limit. Pin
implements I
OUT
• R = V
BE
current clamp. Internal clamp
resistor has a typical value of 3.5. For maximum current
drive capability (190mA typical) short pin to pin V
.
Reduction of current sink capability is achieved by placing
additional resistance from pin LIM
to pin V
. (i.e. An
external 3.5 resistance from pin LIM
to pin V
will
reduce the current sinking capability of the output ampli-
fier by approximately 50%.)
V
(Pin 5): Local Negative Supply. Typically connected to
the source of the active tracking supply P-channel MOSFET.
V
rail voltage is GATE
self-bias voltage less the MOSFET
V
GS
. Typical P-channel MOSFET characteristics provide
AT
REF
– V
10V.
GATE
(Pin 6): Negative Power Supply FET Gate Drive. Pin
sources current from pull-down resistor to bias gate of
active tracking supply P-channel MOSFET. Self-biases to
a typical value of –14V, referenced to pin AT
REF
. Pull-down
resistor value is determined such that current sourced
from the GATE
pin remains greater than 50µA at mini-
mum output signal voltage and less than 10mA at maxi-
mum output signal voltage.
AT
REF
(Pin 7): Active Tracking Supply Reference. Typi-
cally connected to pin OUT. Pin bias current is the differ-
ence between the magnitudes of GATE
+
pin bias and
GATE
pin bias (I
ATREF
= I
GATE
+I
GATE
).
OUT (Pin 8): Ring Tone Output Pin. Output of active filter
amplifier/buffer. Used as reference voltage for internal
functions of IC. Usually shorted to pin AT
REF
to generate
reference for active tracking supply circuitry. Connect a 1A
(1N4001-type) diode between V
+
and OUT and a
1A Schottky diode from V
to OUT for line transient
protection.
LIM
+
(Pin 9): Output Amplifier Current Source Limit. Pin
implements I
OUT
• R = V
BE
current clamp. Internal clamp
resistor has a typical value of 3.5. For maximum current
drive capability (190mA typical) short pin LIM
+
to pin
OUT. Reduction of current source capability is achieved by
placing additional resistance from pin LIM
+
to pin OUT.
(i.e. An external 3.5 resistance from pin LIM
+
to pin OUT
will reduce the current sourcing capability of the output
amplifier by approximately 50%.)
V
+
(Pin 10): Local Positive Supply. Typically connected to
the source of the active tracking supply N-channel MOSFET.
This condition should be made using a ferrite bead.
Operating V
+
rail voltage is GATE
+
self-bias voltage less
the MOSFET V
GS
. Typical N-channel MOSFET characteris-
tics provide V
+
– AT
REF
10V.
GATE
+
(Pin 11): Positive Power Supply FET Gate Drive.
Pin sinks current from pull-up resistor to bias gate of
active tracking supply N-channel MOSFET. Self-biases to
a typical value of 14V, referenced to pin AT
REF
. Pull-up
resistor value is determined such that sink current into
GATE
+
pin remains greater than 50µA at maximum output
signal voltage and less than 10mA at minimum output
signal voltage.
AMPIN (Pin 12): Output Amplifier Input. Connected to
external filter components through series protection re-
sistor (usually 5k). Thevenin DC resistance of external
filter and protection components should be 10k for opti-
mum amplifier offset performance. See Applications In-
formation section.
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LT1684
BG
OUT
(Pin 13): Normalized PWM Buffered Output. PWM
differential input is amplitude normalized to ±1.25V (refer-
enced to the OUT pin). This signal is used to drive the
active filter/amplifier. Filter resistor values must be chosen
to limit the maximum current load on this pin to less than
2mA. The output is current limit protected to a typical value
of ±4.5mA.
IN A (Pin 14): PWM Positive Input. Input is isolated from
digital source by ~100pF series capacitor. A 10k resistor
should be connected to the IN A pin in series with the
isolation capacitor for transient protection. The PWM
receiver implements a diode forward drop of input hyster-
esis (relative to IN B). This hysteresis and internal signal
limiting assure common mode glitch rejection with isola-
tion capacitor mismatches up to 2:1. For maximum perfor-
mance, however, effort should be made to match the two
PWM input isolation capacitors. Pin IN A is differentially
clamped to pin IN B through back-to back isolation-base
diodes. This results in a high impedance differential input
±100mV beyond the input thresholds. 5k internal input
resistors yield a 10k (nominal) differential overdrive im-
pedance.
LT1684 Block Diagram
+
5k10k IN A
100pF
+
5k10k IN B
100pF
PWM
INPUT
5k
AMPIN
20pF
(RING RETURN)
100pF
FILTER
ELEMENTS
BGOUT
COMP1
COMP2
RING
OUTPUT
15k
CURRENT
LIMIT
GATE
LIM
V
V
V+
OUT
LIM+
ATREF
14V
14V
GATE+
V+
1684 BD
1.25V
1.25V
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FUNCTIONAL BLOCK DIAGRA
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LT1684
BASIC THEORY OF OPERATION
The LT1684 operates using a user-provided pulse-width-
modulated (PWM) digital signal as input*. The low fre-
quency modulation component of this signal represents
the desired output waveform. Changing the PWM input
can thus dynamically control the frequency, cadence,
amplitude and DC offset of the desired output. This method
of sine wave generation can accomodate all popular ring
tone frequencies including 17Hz, 20Hz, 25Hz and 50Hz.
The LT1684 receives the PWM input by a capacitor-
isolated differential input at pins IN A and IN B. This signal
is amplitude normalized by a bandgap reference and
output single-ended on the BG
OUT
pin such that the PWM
carrier is ±1.25V about the voltage on the OUT pin.
The low frequency component of the normalized PWM
signal is recovered using an active filter circuit con-
structed using an onboard driver amplifier. This amplifier
also provides current drive for the final ring tone output.
The ring tone output is used as the reference for a floating
active biasing scheme by pin AT
REF
. As the ring tone
output rises and falls through its typical range of hundreds
of volts, the LT1684 “tracks” the output signal, maintain-
ing local supply voltages across the IC of approximately
±10V.
Input Receiver/Reference Buffer
The differential receiver for the PWM input signal requires
minimum differential input levels of 1.6V to assure valid
change-of-state. The receiver inputs are capacitor coupled,
isolating the LT1684 from the PWM generator. The re-
ceiver is leading edge triggered.
The input receiver controls a switched-state output that
forces an amplitude normalized voltage (referenced to the
OUT pin) of ±1.25V that follows the PWM input. This
switched voltage is driven off-chip on pin BG
OUT
. When
the IN A input is driven higher than IN B (by the required
1.6V), the reference drives BG
OUT
to +1.25V above OUT.
When IN B input is driven higher than IN A, BG
OUT
is forced
to –1.25V relative to OUT.
The amplitude normalized representation of the input
PWM signal is used as the input for the active filter element
and output driver.
Output Amplifier/Driver
The normalized PWM signal output on the BG
OUT
pin is
converted to the final ring tone signal by an active filter.
This filter consists of an onboard amplifier and a few
external components. Although many different types of
filters can be constructed, a 2-pole Multiple Feedback
(MFB) configuration generally provides adequate perfor-
mance and is desirable due to its simplicity and effective-
ness.
The low frequency component of the ±1.25V PWM signal
contains the desired ring tone frequency and cadence
information. The MFB active filter strips this information
from the PWM signal and amplifies this low frequency
component to generate the final desired output.
Active Tracking Supplies
Implementation of the active tracking supply technique
enables linear generation of the ring tone output, and takes
advantage of the intrinsic supply noise immunity of a
linear amplifier, reducing the need for large high voltage
filtering elements.
Two external power MOSFETs act as voltage level-shifting
devices and generate the power supply voltages for the
LT1684. The LT1684 uses its own output as a voltage
reference for the FET level shifters, “suspending” itself (by
these generated supply voltages) about the signal output.
In this manner, the LT1684 can linearly generate a signal
hundreds of volts in amplitude at its output, while main-
taining ±10V local supply rails across the IC itself.
(Refer to Functional Block Diagram)
* Contact Linear Technology for code.
OPERATIO
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LT1684
Encoded PWM Signal Input Basics
The LT1684 accepts a user-supplied PWM carrier that
represents the desired output ring tone signal. This PWM
input is normalized by the LT1684 such that ring tone
output amplitudes can be accurately encoded into the
PWM input.
The LT1684 accepts a differential input to maximize rejec-
tion of system transients and ground noise. If no differen-
tial signal is readily available from the PWM controller, a
simple inverter/buffer block can be used to create the
differential signal required.
Each differential input is internally connected through a 5k
series resistor to back-to-back isolation-base diodes. These
devices internally clamp the differential input signal to
±100mV greater than the input comparator hysteresis
range. The input comparator toggles with a differential
hysteresis equal to that of a standard diode forward
voltage (0.7V nominal). As such, the differential imped-
ance of the input remains high throughout the input
hysteresis region, then reduces to a nominal value of 10k
(7k minimum) as the input is overdriven beyond the
comparator input threshold. A minimum differential input
of 1.6V is specified to assure valid switching.
The PWM signal can be visualized in terms of instanta-
neous ring tone amplitude, normalized to the LT1684
amplitude reference. For a given desired output voltage
V
OUTN
, the input pulse train required follows the relation:
V
OUTN
= 2 • V
REF
• (DC – 0.5), or
DC = [V
OUTN
/ (2 • V
REF
)] + 0.5, where:
V
REF
= 1.25V normalized peak voltage
DC = PWM input duty cycle
A 10% to 90% duty cycle range is a practical limit for a
10kHz input carrier. This corresponds to normalized sig-
nal amplitude of ±1V. Duty cycles exceeding this range can
cause increased output signal distortion as signal energy
is lost due to finite rise and fall times becoming a signifi-
cant percentage of the signal pulses. The associated
reduction in the pulse energy manifests itself as a “soft
clipping” of the output signal resulting in an increase in
harmonic distortion.
The normalized PWM signal is amplified to the desired
output signal level by the active filter/amplifier stage.
Thus, dividing the desired peak output amplitude by the
peak normalized encoded amplitude (V
OUT
/V
OUTN
) yields
the required DC gain of the active filter.
System Considerations
Assuming use of a 10% to 90% maximum PWM range, the
peak normalized signal will be:
V
PWM
(pk) = ± 0.8 • V
REF
= ±1.0V, and:
V
OUT
(pk) = V
PWM
(pk) • Filter DC Gain
Thus, the DC gain of the output filter equals the desired
peak voltage of the output ring tone signal.
The frequency characteristics of the lowpass output filter
must reflect the allowable carrier ripple on the output
signal. For example, a 10kHz carrier system could use a
2-pole Butterworth lowpass with a cutoff frequency of
100Hz. This filter provides 40dB of input signal rejection
at 10kHz yielding 25mV
P-P
output ripple. If the DC gain of
the output filter/amplifier was 100, the output ripple volt-
age would be riding on a ±100V sine wave, and therefore
be about –78dB relative to the output ring signal.
APPLICATIO S I FOR ATIO
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LT1684
For applications that are extremely output ripple sensitive,
additional carrier rejection can be accomplished by modi-
fying the output filter/amplifier characteristics such as
implementing elliptical filter characteristics with a lower
cutoff frequency or implementation of additional poles.
Filter Design and Component Selection
The ring tone information represented in the low fre-
quency component of the input PWM signal is retrieved
using an active filter. This filter also generates the appro-
priate low frequency gain required to produce the high
voltage output signal and references the output to ground
(or other system reference). The frequency and gain
characteristics of this circuit element are both configurable
by the appropriate choice of external passive filter ele-
ments. Because of the active tracking supply mode of
operation, conventional active filter topologies cannot be
used. Most amplifier/filter topologies can, however, be
“transformed” into active tracking supply topologies.
A conventional amplifier circuit topology can be “trans-
formed” into an active tracking supply amplifier circuit by:
a) Inverting the amplifier signal polarity (swap amplifier +
and – connections) and input source polarity.
b) Referencing all signals to the output except the feed-
back elements, which are referenced to ground (swap
output and ground).
A variety of amplifier/filter configurations can be realized
using the transformation technique. A 2-pole filter is
generally adequate for most ringer applications. Due to the
relative simplicity of infinite-gain Multiple Feedback (MFB)
configurations, these filters are good candidates for ringer
applications. Component selection and active tracking
supply transformation will be described for the following
2-pole MFB infinite-gain lowpass filter.
+
+
VIN
R1 R2
LOAD
+
+
VIN
R1
TRANSFORMATION
Conventional Amplifier Configuration Active Tracking Supply Amplifier
Lowpass Mulitple Feedback Active Filter Active Tracking Supply Lowpass
Multiple Feedback Filter
R2 LOAD
TRANSFORMATION
+
+
VIN
R1 R3
C1 LOAD
C2R2
+
R3R1
1684 F01
LOAD
C2
C1
R2
+
VIN
APPLICATIO S I FOR ATIO
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LT1684
The component selections for the active tracking supply
lowpass MFB filter configuration follow the relations:
C
2
= mC
1
m 1 / [4Q
2
(1+|H
O
|)]
R
2
= 1± [1–4mQ
2
(1+|H
O
|)]
1/2
2ω
n
C
1
mQ
R
1
= R
2
/ |H
O
|
R
3
=1
ω
n2
C
12
R
2
m
Example:
Conditions: Output ring tone peak voltage = 100V
Ring frequency = 20Hz
Input duty cycle range = 10% to 90%
Filter Q = 0.707
Set: f
n
= ω
n
/ 2π = 100Hz
Choose: C
1
= 1.0
µ
F (a convenient value)
Then: m [4(0.7)
2
(1+100)]
–1
.005
C
2
= mC
1
C2 = 4700pF
(sets m = 0.0047)
R
2
= 1± [1– 4(0.0047)(0.707)
2
(101)]
1/2
(4π100)(1e–6)(.0047)(0.707)
R
2
= 300k
R
1
= 300k/100
R
1
= 3.0k
R
3
= [(2π100)
2
(1e–6)
2
(300k)(0.0047)]
–1
R
3
= 2k
This filter configuration yields a DC Gain of 100, a corner
frequency of just under 100Hz with gain reduction of only
0.1% at 20Hz, and a 10kHz carrier rejection of greater than
40dB at the output.
Active Tracking Supply Components
Given the previous discussion, implementation of an
active tracking supply system may seem almost trivial.
Active Tracking Supply Lowpass Multiple
Feedback Filter Transfer Characteristic (AV vs fn)
However, bootstrapping an amplifier system about its
own output creates a complex myriad of inherent stability
and response issues. Attempting such a configuration
with generic “jelly-bean” components is not recommended
for the faint of heart or type-A personalities. The LT1684,
however, makes for a simplistic approach to active track-
ing component selection.
The high voltage MOSFET transistors used in the circuit
must have an operating V
DS
specified at greater than the
corresponding high voltage supply rail plus the opposite
maximum excursion of the output signal. For example, if
a system is designed with a 240V supply (+120V,
–120V) and outputs a ring signal that has a 100V peak
amplitude, the MOSFET V
DS
ratings must be greater than
240/2 + 100 = 220V.
Active Filter Tuned Oscillator—
No PWM Input Required
A simple yet effective method of producing a high quality
sine wave is to place a high-Q bandpass filter and a hard
limited gain element in a positive feedback loop. This
circuit will oscillate at the bandpass frequency, producing
a sine wave at the filter output. The product of the funda-
mental component of the limiter and the filter gain at the
bandpass frequency determines the output amplitude.
This type of circuit is commonly referred to as an active
filter tuned oscillator.
HERTZ (Hz)
1 10 100 1K 10K 100K
FILTER GAIN (dB)
1684 F02
–50
0
50
APPLICATIO S I FOR ATIO
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11
LT1684
+
R
F3
R
F1
+
R
F2
V
IN
C
F2
C
F1
V
OUT
1684 F4a
Active Filter Tuned Oscillator Block Diagram
The LT1684 can be implemented easily into a telephone
ringer circuit based on the active filter tuned oscillator
topology, eliminating the need for a user-supplied PWM
input signal. The LT1684’s active filter amplifier can be
used as a high-Q bandpass filter element by configuring
it as an active tracking supply bandpass. The LT1684’s
controlled output receiver/buffer is also convenient for
use as the hard limiter. Because the LT1684 receiver/
buffer requires a true differential input for proper opera-
tion, a dual comparator IC such as the LT1017 must be
bootstrapped along with the LT1684 to provide differen-
tial control signals. The LT1017 and LT1684 receiver/
buffer combine to create a high gain hard limiter whose
output is controlled to ±1.25V. The LT1684 active
bandpass filter is then connected as a positive feedback
element with the limiter component, which completes
the active filter tuned oscillator topology.
The active bandpass filter circuit is easily configured using
a basic MFB bandpass configuration, however, the active
tracking supply technique used by the LT1684 requires
“transformation” of this topology. This “transformation”
swaps the amplifier signal polarity, references all signals
to the output, and references all feedback elements to
ground as described previously in the Filter Design and
Component Selection section.
The design equations for the active tracking bandpass
filter are the same as the pretransformation MFB topology,
such that if C
F1
= C
F2
= C:
R
F1
= Q/(ω
O
• C •H
0
)
R
F2
= Q/(2Q
2
H
0
)(ω
O
• C)
R
F3
= 2Q/(ω
O
• C)
Example:
Conditions: Output peak voltage = 95V
Ring frequency = 20Hz
Bandpass Q = 9.4
A square wave with peak amplitude A has a fundamental
component with amplitude 4A/π, where A = 1.25V. There-
fore, the desired filter’s bandpass gain H
O
= 95/(4 •
1.25/π) ~ 60. Given capacitor values C = 0.22µF (a conve-
nient value) and desired filter characteristics of: Q = 9.4,
H
O
= 60, ω
O
= 2π(20Hz), then: R
F1
= 5.6k, R
F2
= 2.7k,
R
F3
= 680k. The amplitude, frequency and envelope re-
sponse time of the output signal can be adjusted by simply
changing the values of resistors R
F1
to R
F3
accordingly.
This produces a high voltage, high quality 20Hz sine wave
at the filter output with a peak amplitude of 95V. Differen-
tial amplitude and frequency characteristics are achieved
by simply changing a few resistor values. The output of the
LT1684 is internally current limited to a minimum of
±100mA peak, allowing this ring tone generation circuit to
be used with loads up to 7 REN with no degradation of the
output waveform.
+
R
F2
+
R
F1
V
IN
C
F2
R
F3
C
F1
V
OUT
1684 F5b
Bandpass MFB Filter
Active Tracking Bandpass MFB Filter
1684 F03
APPLICATIO S I FOR ATIO
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12
LT1684
IN B
COMP1
COMP2
LIM
V
GATE
AT
REF
IN A
BG
OUT
AMPIN
GATE
+
LT1684
V
+
LIM
+
OUT
1
2
3
4
5
6
110V
110V
7
14
13
12
11
10
9
8
R10
10k
C2
100pF
D1
1N5817
C1 20pF
R8
10k
R
F1
5.6k
R3
100k
R2
100
FB1
M1
IRF610
M2
IRF9610
C5
0.1µF
D2
1N4001
OUTPUT
1684 F05a
+
C4
6.8nF
R1 100
R
F2
2.7k
R4
100k
R
F3
680k
C
F1
0.22µF
C
F2
0.22µF
R9
10k R6
1k
+
1/2 LT1017
V
+
8
7
4
5
6V
+
1/2 LT1017
V
+
8
4
3
2
1
V
R5
100k
C3
6.8nF
±100mA
PEAK
()
FB1: FERRONICS FMB1601 (716) 388-1020
Active Filter Tuned Oscillator Ring Tone Generator
Ringer Output
APPLICATIO S I FOR ATIO
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13
LT1684
5V-15V to Ring Tone Fully Isolated Converter Using an Active Filter-Tuned Oscillator Circuit
IN B
COMP1
COMP2
LIM
V
GATE
AT
REF
IN A
BG
OUT
AMPIN
GATE
+
LT1684
V
+
LIM
+
OUT
1
2
3
4
5
6
7
14
13
12
11
10
9
8
C6
100pF
DS1
1N5817
C5 20pF
R3
10k
R
F1
5.6k
R8
100k R1
1k
R2 10k
R7
100k
R4 10k
LT1017
R6
100
FB1
M1
IRF610
M2
IRF9610
C3
0.1µF
D1
1N4001
OUTPUT
1684 TA03
+
C2
6.8nF
R5 100
DS2
MBRS1100
R
F2
2.7k
R14
100k
R
F3
680k
C
F1
0.22µF
C
F2
0.22µF
C1
6.8nF
OUT A
–IN A
+IN A
V
EE
8
7
6
5
1
2
3
4
V
CC
OUT B
IN B
+IN B
R13
50k
DZ4
91V
OPTO2 H11AG1
15
4
6
2
4
1
3
5
2
R11
50k
R10
10k
2
5, 6
7, 8
1
12
11
49
R15
2k
V
IN
FB
SW
LT1270
GND V
C
C10
0.1µF
C13
0.01µF
C4
1µF
C8
1nF
R12
10k
R9
39
D3
1N4001
T1
COILTRONICS
14239-X3
C9
0.47µF
160V
C11
0.47µF
160V
C14
10µF
160V
C15
10µF
160V
C12
0.47µF
160V
D4
MURS160
D2
MURS160
DZ2
91V
OPTO1 H11AG1
15
4
6
2
DZ1
44V
+
+
C7
220µF
10V
5V TO 15V
INPUT
+
LOAD (REN)
7
10
V (PEAK)
95V
70V
R
F1
5.6k
6.8k
R
F2
2.7k
3.3k
R
F3
680k
620k
FB1: FERRONICS FMB1601 (716) 388-1020
TYPICAL APPLICATIO S
U
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14
LT1684
PWM
IN
1000pF
1000pF
10k
10k
3k
300k 0.1µF470pF
5k
2k
100k
100k
6800pF
6800pF
MTP-
2N50E
MTP-
2N50E
120V
–120V
100
100
IN A
IN B
BGOUT
AMPIN
V+
COMP1
LIM+
OUT
ATREF
COMP2
LIM
V
GATE+
GATE
14
1
13
12
10
2
9
8
7
3
4
5
11
6
LT1684
FB1
100pF
20pF
180µH
180µH
3.9k
1nF
1684 TA04
1nF
2N3904
2N3906
2N3906
2N3904
100
47
47
100
100
IRF9240
–100V
1k
1k
1µF
1µF
0.22
0.22
0.22
IRF230
100V
2k 1µH
VIN
SENSE+
ILIM+
VOUT
ILIM
SENSE
VBOTTOM
VTOP
LT1166
2
4
1
8
7
3
6
5
TYPICAL POWER SLICE
(1 OF 13 IN PARALLEL)
100
FB1: FERRONICS FMB1601 (716) 388-1020
5kW
LOAD
5kW PWM-to-Analog Converter
TYPICAL APPLICATIO S
U
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15
LT1684
Dimensions in inches (millimeters) unless otherwise noted.
N Package
14-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
S Package
14-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
N14 1098
0.020
(0.508)
MIN
0.125
(3.175)
MIN
0.130 ± 0.005
(3.302 ± 0.127)
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
0.018 ± 0.003
(0.457 ± 0.076)
0.100
(2.54)
BSC
0.005
(0.125)
MIN
0.255 ± 0.015*
(6.477 ± 0.381)
0.770*
(19.558)
MAX
31 24567
8910
11
1213
14
0.009 – 0.015
(0.229 – 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.325 +0.035
0.015
+0.889
0.381
8.255
()
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
1234
0.150 – 0.157**
(3.810 – 3.988)
14 13
0.337 – 0.344*
(8.560 – 8.738)
0.228 – 0.244
(5.791 – 6.197)
12 11 10 9
567
8
0.016 – 0.050
(0.406 – 1.270)
0.010 – 0.020
(0.254 – 0.508)× 45°
0° – 8° TYP
0.008 – 0.010
(0.203 – 0.254)
S14 1298
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
0.004 – 0.010
(0.101 0.254)
0.050
(1.270)
BSC
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
PACKAGE DESCRIPTIO
16
LT1684
1684f LT/TP 0300 4K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1999
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear-tech.com
TYPICAL APPLICATIO
U
5V Input Nonisolated 5 REN Ring Generator
IN B
C1
100pF
C2
100pF
PWM
INPUT
+
V
IN
5V
R4
10k
LT1684
COMP1
COMP2
LIM
V
GATE
AT
REF
IN A
BG
OUT
AMPIN
GATE
+
V
+
LIM
+
OUT
C3 100pF
C4 20pF
R2
10k
R3
5k
FB1
C8
1µF
C13 0.1µF
R1
2k
C5
4700pF
C7
6.8nF
160V
C6
6.8nF
160V
R6
3k
D1
1N4001
DS2
D1N5817
DS1
MBRS1100
DZ1
60V
MMSZ5264BT1
–100V
100V
R5
300k
R10
100k
M2
IRF9610
R7
100R9
100k
R8
100
M1
IRF610
C11
0.47µF
160V
C10
0.47µF
160V
T1
COILTRONICS
CTX 14468-X1
12
10
9
7
4, 5
1, 2
+
+
C12
220µF
35V
+
D2
MURS160T3
D3
MURS160T3
V
IN
FB
SW
V
C
LT1271
U1
GND
4
1
5
2
3
V
CC
+IN B
OUT A
V
EE
LT1211
1
4
8
OUT B
–IN A
27
–IN B+IN A
36
5
C9
0.1µF
R11
470
R12
5k
D4
D1N4148 D5
D1N4148
R15
12k
R16
1M
R13
12k
R14
1M
RING TONE
OUT
1684 TA02
FB1: FERRONICS FMB1601 (716) 388-1020
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1082 1A High Voltage Switching Regulator V
IN
= 3V to 75V, SW Voltage = 100V
LT1166 Power Output Stage Automatic Bias System Sets Class AB Bias Currents, Eliminates Adjustments
and Thermal Runaway
LTC1177-5/LTC1177-12 Isolated MOSFET Drivers 2500V
RMS
Isolation, UL Recognized
LT1270 8A Power Switching Regulator V
IN
= 3.5V to 30V, I
Q
= 7mA
LT1271 4A Power Switching Regulator V
IN
= 3.5V to 30V, I
Q
= 7mA
LT1339 High Power Synchronous DC/DC Controller Operation Up to 60V, Output Current Up to 50A
LT1676 Wide Input Range, High Efficiency, Step-Down Switching Regulator Operation Up to 60V, 100kHz, Up to 500mA Output

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