Fiche technique pour MC33039,NCV33039 de onsemi

L 0N Semiconductorg nnnn o UUUU I’M—WWW ULILILI
© Semiconductor Components Industries, LLC, 2012
June, 2012 Rev. 6
1Publication Order Number:
MC33039/D
MC33039, NCV33039
Closed Loop Brushless
Motor Adapter
The MC33039 is a high performance closedloop speed control
adapter specifically designed for use in brushless DC motor control
systems. Implementation will allow precise speed regulation without
the need for a magnetic or optical tachometer. This device contains
three input buffers each with hysteresis for noise immunity, three
digital edge detectors, a programmable monostable, and an internal
shunt regulator. Also included is an inverter output for use in systems
that require conversion of sensor phasing. Although this device is
primarily intended for use with the MC33035 brushless motor
controller, it can be used cost effectively in many other closedloop
speed control applications.
Features
Digital Detection of Each Input Transition for Improved Low Speed
Motor Operation
TTL Compatible Inputs With Hysteresis
Operation Down to 5.5 V for Direct Powering from MC33035
Reference
Internal Shunt Regulator Allows Operation from a NonRegulated
Voltage Source
Inverter Output for Easy Conversion between 60°/300° and
120°/240° Sensor Phasing Conventions
PbFree Packages are Available
Representative Block Diagram
15 k
-
+
To Rotor
Position
Sensors
VCC
7
GND
φC
4
φA
+
20 k
0.3 V
+
-
+
8.25 V
8
RT
fout
5
2R
R
+
R
Delay
QS
1
φA
φB
6
3
2
CT
Delay
Delay
+
http://onsemi.com
MARKING
DIAGRAMS
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G= PbFree Package
1
1
1
PDIP8
P SUFFIX
CASE 626
MC33039P
AWL
YYWWG
SOIC8
D SUFFIX
CASE 751
PIN CONNECTIONS
fout
RT/CT
GND
Inputs
φB
φA
φA
4
3
2
8
7
6
5
φC1
(Top View)
VCC
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
33039
ALYW
G
1
MC33039, NCV33039
http://onsemi.com
2
MAXIMUM RATINGS
Rating Symbol Value Unit
VCC Zener Current IZ(VCC)30 mA
Logic Input Current (Pins 1, 2, 3) IIH 5.0 mA
Output Current (Pins 4, 5), Sink or Source IDRV 20 mA
Power Dissipation and Thermal Characteristics
Maximum Power Dissipation @ TA = + 85°C
Thermal Resistance, JunctiontoAir
PD
RqJA
650
100
mW
°C/W
Operating Junction Temperature TJ+150 °C
Operating Ambient Temperature Range
MC33039
NCV33039
TA
40 to +85
40 to +125
°C
Storage Temperature Range Tstg 65 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
ELECTRICAL CHARACTERISTICS (VCC = 6.25 V, RT = 10 k, CT = 22 nF, TA = 25°C, unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
LOGIC INPUTS
Input Threshold Voltage
High State
Low State
Hysteresis
VIH
VIL
VH
2.4
0.4
2.1
1.4
0.7
1.0
0.9
V
Input Current
High State (VIH = 5.0 V)
φA
φB, φC
Low State (VIL = 0 V)
φA
φB, φC
IIH
IIL
40
190
60
0.3
300
0.3
80
5.0
380
5.0
mA
MONOSTABLE AND OUTPUT SECTIONS
Output Voltage
High State
fout (Isource = 5.0 mA)
φA (Isource = 2.0 mA)
Low State
fout (Isink = 10 mA)
φA (Isink = 10 mA)
VOH
VOL
3.60
4.20
3.95
4.75
0.25
0.25
4.20
0.50
0.50
V
Capacitor CT Discharge Current Idischg 20 35 60 mA
Output Pulse Width (Pin 5) tPW 205 225 245 ms
POWER SUPPLY SECTION
Power Supply Operating Voltage Range
MC33039 (TA = 40° to +85°C)
NCV33039 (TA = 40° to +125°C)
VCC 5.5 VZV
Power Supply Current ICC 1.8 3.9 5.0 mA
Zener Voltage (IZ = 10 mA) VZ7.5 8.25 9.0 V
Zener Dynamic Impedance (DIZ = 10 mA to 20 mA, f p 1.0 kHz) Zka2.0 5.0 W
“H‘H‘Hl‘w‘mwmimlmmu ‘w“‘ ““ ‘_‘ LIL ‘w‘ ‘ “‘w‘_‘ LL \ \\\\\\\ \\ \ \_||_ L H‘H‘HI‘HIHH H ‘_ \ ___|__l_—| 4'1 4*7
MC33039, NCV33039
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3
Figure 1. Typical Three Phase, Six Step Motor Application
fout Output
Latch ISetI Input
φA Output
φC
120° Sensor
Electrical
Phasing
Input
φB
RT/CT
φC
60° Sensor
Electrical
Phasing
Input
φB
φA
φA
Vout (AVG)
Constant Motor Speed Increasing Motor
Speed
Vth 0.67 VCC
24060 120 300 7206000
Rotor Electrical Position (Degrees)
180 360 480
OPERATING DESCRIPTION
The MC33039 provides an economical method of
implementing closedloop speed control of brushless DC
motors by eliminating the need for a magnetic or optical
tachometer. Shown in the timing diagram of Figure 1, the
three inputs (Pins 1, 2, 3) monitor the brushless motor rotor
position sensors. Each sensor signal transition is digitally
detected, ORied at the Latch iSeti Input, and causes CT to
discharge. A corresponding output pulse is generated at fout
(Pin 5) of a defined amplitude, and programmable width
determined by the values selected for RT and CT (Pin 6). The
average voltage of the output pulse train increases with
motor speed. When fed through a low pass filter or
integrator, a DC voltage proportional to speed is generated.
Figure 2 shows the proper connections for a typical closed
loop application using the MC33035 brushless motor
controller. Constant speed operation down to 100 RPM is
possible with economical three phase four pole motors.
The φA inverter output (Pin 4) is used in systems where the
controller and motor sensor phasing conventions are not
compatible. A method of converting from either convention
to the other is shown in Figure 3. For a more detailed
explanation of this subject, refer to the text above Figure 39
on the MC33035 data sheet.
The output pulse amplitude VOH is constant with
temperature and controlled by the supply voltage on VCC
(Pin 8). Operation down to 5.5 V is guaranteed over
temperature. For systems without a regulated power supply,
an internal 8.25 V shunt regulator is provided.
MC33039, NCV33039
http://onsemi.com
4
3
2
1
Delay
Delay
Delay
48
8.25V
7
SQ
R
0.3V
+
-
+
-
+
R
2R 15k
6
5
MC33039P
RT
CT
Enable
Speed
Set
MC33035P
OSC
PWM
EA
-
+
-
+
S
Q
R
R
S
Q
Thermal
REF
UVLO
+
+
+
Fwd/
Rev
VCC
POS
DEC
Brake
ILIMIT
-
+
Output Buffers
Motor
φA
Fault
VM
NS
SN
Assy
Rotor
Figure 2. Typical Closed Loop Speed Control Application
20 k
vac : a 25 v TA: 25°C cT : 220 HP cT : 22 "F TA: 74m T :125°C A Sink swam (Load m vac}
MC33039, NCV33039
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5
Figure 3. fout, Pulse Width
versus Timing Resistor
Figure 4. fout, Pulse Width Change
versus Temperature
TA , AMBIENT TEMPERATURE (°C)
RT , TIMING RESISTOR (kW)
0
1.0
10
2.0
0.1
100
20 200
0.01
- 55
-0.8
0
- 25 + 25 + 50 + 125+ 100+ 75
-1.6
+0.8
+1.6
tPW, OUTPUT PULSE WIDTH (ms)
tPW, OUTPUT PULSE WIDTH CHANGE (%)Δ
VCC = 6.25 V
TA = 25°C
CT = 220 nF
CT = 22 nF
CT = 2.2 nF
VCC = 6.25 V
RT = 10 k
CT = 22 nF
Figure 5. fout, Pulse Width Change
versus Supply Voltage
Figure 6. Supply Current versus
Supply Voltage
0
VCC , SUPPLY VOLTAGE (V)
4.0
4.5
+ 4.0
+ 2.0
0
- 2.0
- 4.0
5.5 6.5 7.5 8.5
VCC , SUPPLY VOLTAGE (V)
2.0 6.04.0 8.0 10
8.0
0
12
16
20
ICC , SUPPLY CURRENT (mA)
tPW, OUTPUT PULSE WIDTH CHANGE (%)Δ
TA = 25°CPins 1, 2, 3
Connected
together
TA = 25°C
TA = 125°C
TA = -40°C
+ 0.4 0
0
TA , AMBIENT TEMPERATURE (°C)
0 + 125
+ 0.6
+ 0.4
+ 0.2
IO , OUTPUT LOAD CURRENT (mA)
4.0 8.0 12 16
+ 0.2
- 4.0
- 2.0
0
0
0
+ 25- 25- 55
-16
- 8.0
+8.0
+ 50
+16
+ 75 + 100
- 0.2
Vsat , OUTPUT SATURATION VOLTAGE (V)
Vsat (sink), SINK SATURATION CHANGE (%)
Δ
Vsat (SOURCE), SOURCE SATURATION CHANGE (%)
Δ
Figure 7. fout, Saturation
versus Load Current
Figure 8. fout, Saturation Change
versus Temperature
VCC = 6.25 V
TA = 25°C
Source Saturation
(Load to Ground)
VCC
GND
Sink Saturation
(Load to VCC)
VCC = 6.25 V
IO = 5.0 mA
DSink Saturation
(Load to VCC)DSource Saturation
(Load to Ground)
MC33039, NCV33039
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6
ORDERING INFORMATION
Device Operating Temperature Range Package Shipping
MC33039D
TA = 40°C to +85°C
SOIC8
98 Units / Rail
MC33039DG
MC33039DR2
2500 / Tape & Reel
MC33039DR2G
MC33039P
PDIP850 Units / Rail
MC33039PG
NCV33039DR2*
TA = 40°C to +125°C SOIC82500 / Tape & Reel
NCV33039DR2G*
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV33039: Tlow = 40C, Thigh = +125C. Guaranteed by design. NCV prefix is for automotive and other applications requiring
site and change control.
SCALE 1:1 a i and ENDVIEW erH LEADS DOIISTRAIIIED /_‘_'\ 0N Semiwndudw" TES DIMENSIONINO AND TOLERANOINO P CONTROLLING DIMENSION INcHES DIMENSIONS A AI AND L ARE MEASURED WITH THE P AGE SEATED IN JEDEC SEATINO PLANE OAUOE OSes DIMENSIONS D DI AND EI DO NOT INCLUDE MOLD ELASH OR PRoTRUSIONS MOLD FLASH OR PROTRUSIONS ARE NOT TO EXCEED n In INcH DIMENSION E IS MEASURED AT A POINT a ma aELOW DATUM PLANE H WITH THE LEADS CONSTRAINED PERPENDIcULAR To DATUM c DIMENSION ea IS MEASURED AT THE LEAD TIPS WITH THE LEADS UNOONSTRAINED DATUM PLANE H IS cDINcIDENT WITH THE BOTTOM OF THE LEADS WHERE THE LEADS EXIT THE DoDv PACKAGE CONTOUR IS OPTIONAL (ROUNDED DR SOUARE CORNERS] IIIcNES MILuMETERS DIM MIN MAX MIN MAx A , new we 5 33 AI nms , 035 A2 DIIS I2 I95 292 we I: D Im a n22 n 35 u 56 \ n2 DDGUTVP IszTVP I: DUDE mm 020 I336 D 0355 men 902 me \ m Imus III: , e Inna (1325 752 326 El new nzsn aIII 7n ‘1’ ‘ . amass mesa ea 93 , man Iasz I I L ans nISn :aI ENDVIEW M , ID III- SIDEVIEW GENERIC MARKING DIAGRAM‘ xxxxxxxxx AWL O wwwe xxxx :SpeCIlIcDevIceCOde A : Assemth LocaIIon WL :WaIerLoI W :Vear ww :WoTkWeek G : Ph-Free Package “This inIoImaIion IS genenc. Please IeIeI Io deVICe dala sheeI IoI acIIIaI pan marking Pb—Fvee Indica‘on “G“ or micmam “ may 0! may noI be presenI, ON SemIcOnduclm ana hademavks aI SenIaanauaIan CDmpOnEnl: InauaLea. LLC aaa ON Semlcanduclar a ll: suhsIdIaTIes In Ine UnIea SIaIes andJm aIneI aaLnneaI ON SEmIcunduclar Tesewes IHe IIgHI KO make changes WIIHaIII IIInHeI naIIee KO any prawns HeIeIn ON Semenduc‘m makes m7 walvamy. represenlalmn III guarantee regardmg IHe eIIIIaIIIIIIy III IVS pmflucl: Iar any panIauIaI purpase nnv dues ON SEmIDDnduclav aeeUme any IIaIIIIIIy avIsIng aIIIIaI Ine applIcs‘Ian III use aI any pIaaIIaIIaI aIreUII ana speaIIIeaIIy aIeeIaIme any and an IIaIIIIIIy InaIUaIng wIlhmA IInIIIaIIan epeeIaI aaneeauenIIaI III InuaenIaI damages oN Sermmnduclar dues nu| eanyey any hcense under IIe paIenI lIghl: nar Ine
PDIP8
CASE 62605
ISSUE P
DATE 22 APR 2015
SCALE 1:1
14
58
b2
NOTE 8
D
b
L
A1
A
eB
XXXXXXXXX
AWL
YYWWG
E
GENERIC
MARKING DIAGRAM*
XXXX = Specific Device Code
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = PbFree Package
*This information is generic. Please refer to
device data sheet for actual part marking.
PbFree indicator, “G” or microdot “ G”,
may or may not be present.
A
TOP VIEW
C
SEATING
PLANE
0.010 CA
SIDE VIEW
END VIEW
END VIEW
WITH LEADS CONSTRAINED
DIM MIN MAX
INCHES
A−−−− 0.210
A1 0.015 −−−−
b0.014 0.022
C0.008 0.014
D0.355 0.400
D1 0.005 −−−−
e0.100 BSC
E0.300 0.325
M−−−− 10
−−− 5.33
0.38 −−−
0.35 0.56
0.20 0.36
9.02 10.16
0.13 −−−
2.54 BSC
7.62 8.26
−−− 10
MIN MAX
MILLIMETERS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK-
AGE SEATED IN JEDEC SEATING PLANE GAUGE GS3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
E1 0.240 0.280 6.10 7.11
b2
eB −−−− 0.430 −−− 10.92
0.060 TYP 1.52 TYP
E1
M
8X
c
D1
B
A2 0.115 0.195 2.92 4.95
L0.115 0.150 2.92 3.81
°°
H
NOTE 5
e
e/2 A2
NOTE 3
MBMNOTE 6
M
STYLE 1:
PIN 1. AC IN
2. DC + IN
3. DC IN
4. AC IN
5. GROUND
6. OUTPUT
7. AUXILIARY
8. VCC
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98ASB42420B
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
PDIP8
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SOIC8 NB
CASE 75107
ISSUE AK
DATE 16 FEB 2011
SEATING
PLANE
1
4
58
N
J
X 45 _
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 75101 THRU 75106 ARE OBSOLETE. NEW
STANDARD IS 75107.
A
BS
D
H
C
0.10 (0.004)
SCALE 1:1
STYLES ON PAGE 2
DIM
A
MIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B3.80 4.00 0.150 0.157
C1.35 1.75 0.053 0.069
D0.33 0.51 0.013 0.020
G1.27 BSC 0.050 BSC
H0.10 0.25 0.004 0.010
J0.19 0.25 0.007 0.010
K0.40 1.27 0.016 0.050
M0 8 0 8
N0.25 0.50 0.010 0.020
S5.80 6.20 0.228 0.244
X
Y
G
M
Y
M
0.25 (0.010)
Z
Y
M
0.25 (0.010) ZSXS
M
____
XXXXX = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G= PbFree Package
GENERIC
MARKING DIAGRAM*
1
8
XXXXX
ALYWX
1
8
IC Discrete
XXXXXX
AYWW
G
1
8
1.52
0.060
7.0
0.275
0.6
0.024
1.270
0.050
4.0
0.155
ǒmm
inchesǓ
SCALE 6:1
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
Discrete
XXXXXX
AYWW
1
8
(PbFree)
XXXXX
ALYWX
G
1
8
IC
(PbFree)
XXXXXX = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G= PbFree Package
*This information is generic. Please refer to
device data sheet for actual part marking.
PbFree indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98ASB42564B
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
SOIC8 NB
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
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SOIC8 NB
CASE 75107
ISSUE AK
DATE 16 FEB 2011
STYLE 4:
PIN 1. ANODE
2. ANODE
3. ANODE
4. ANODE
5. ANODE
6. ANODE
7. ANODE
8. COMMON CATHODE
STYLE 1:
PIN 1. EMITTER
2. COLLECTOR
3. COLLECTOR
4. EMITTER
5. EMITTER
6. BASE
7. BASE
8. EMITTER
STYLE 2:
PIN 1. COLLECTOR, DIE, #1
2. COLLECTOR, #1
3. COLLECTOR, #2
4. COLLECTOR, #2
5. BASE, #2
6. EMITTER, #2
7. BASE, #1
8. EMITTER, #1
STYLE 3:
PIN 1. DRAIN, DIE #1
2. DRAIN, #1
3. DRAIN, #2
4. DRAIN, #2
5. GATE, #2
6. SOURCE, #2
7. GATE, #1
8. SOURCE, #1
STYLE 6:
PIN 1. SOURCE
2. DRAIN
3. DRAIN
4. SOURCE
5. SOURCE
6. GATE
7. GATE
8. SOURCE
STYLE 5:
PIN 1. DRAIN
2. DRAIN
3. DRAIN
4. DRAIN
5. GATE
6. GATE
7. SOURCE
8. SOURCE
STYLE 7:
PIN 1. INPUT
2. EXTERNAL BYPASS
3. THIRD STAGE SOURCE
4. GROUND
5. DRAIN
6. GATE 3
7. SECOND STAGE Vd
8. FIRST STAGE Vd
STYLE 8:
PIN 1. COLLECTOR, DIE #1
2. BASE, #1
3. BASE, #2
4. COLLECTOR, #2
5. COLLECTOR, #2
6. EMITTER, #2
7. EMITTER, #1
8. COLLECTOR, #1
STYLE 9:
PIN 1. EMITTER, COMMON
2. COLLECTOR, DIE #1
3. COLLECTOR, DIE #2
4. EMITTER, COMMON
5. EMITTER, COMMON
6. BASE, DIE #2
7. BASE, DIE #1
8. EMITTER, COMMON
STYLE 10:
PIN 1. GROUND
2. BIAS 1
3. OUTPUT
4. GROUND
5. GROUND
6. BIAS 2
7. INPUT
8. GROUND
STYLE 11:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
STYLE 12:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 14:
PIN 1. NSOURCE
2. NGATE
3. PSOURCE
4. PGATE
5. PDRAIN
6. PDRAIN
7. NDRAIN
8. NDRAIN
STYLE 13:
PIN 1. N.C.
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 15:
PIN 1. ANODE 1
2. ANODE 1
3. ANODE 1
4. ANODE 1
5. CATHODE, COMMON
6. CATHODE, COMMON
7. CATHODE, COMMON
8. CATHODE, COMMON
STYLE 16:
PIN 1. EMITTER, DIE #1
2. BASE, DIE #1
3. EMITTER, DIE #2
4. BASE, DIE #2
5. COLLECTOR, DIE #2
6. COLLECTOR, DIE #2
7. COLLECTOR, DIE #1
8. COLLECTOR, DIE #1
STYLE 17:
PIN 1. VCC
2. V2OUT
3. V1OUT
4. TXE
5. RXE
6. VEE
7. GND
8. ACC
STYLE 18:
PIN 1. ANODE
2. ANODE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. CATHODE
8. CATHODE
STYLE 19:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. MIRROR 2
7. DRAIN 1
8. MIRROR 1
STYLE 20:
PIN 1. SOURCE (N)
2. GATE (N)
3. SOURCE (P)
4. GATE (P)
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 21:
PIN 1. CATHODE 1
2. CATHODE 2
3. CATHODE 3
4. CATHODE 4
5. CATHODE 5
6. COMMON ANODE
7. COMMON ANODE
8. CATHODE 6
STYLE 22:
PIN 1. I/O LINE 1
2. COMMON CATHODE/VCC
3. COMMON CATHODE/VCC
4. I/O LINE 3
5. COMMON ANODE/GND
6. I/O LINE 4
7. I/O LINE 5
8. COMMON ANODE/GND
STYLE 23:
PIN 1. LINE 1 IN
2. COMMON ANODE/GND
3. COMMON ANODE/GND
4. LINE 2 IN
5. LINE 2 OUT
6. COMMON ANODE/GND
7. COMMON ANODE/GND
8. LINE 1 OUT
STYLE 24:
PIN 1. BASE
2. EMITTER
3. COLLECTOR/ANODE
4. COLLECTOR/ANODE
5. CATHODE
6. CATHODE
7. COLLECTOR/ANODE
8. COLLECTOR/ANODE
STYLE 25:
PIN 1. VIN
2. N/C
3. REXT
4. GND
5. IOUT
6. IOUT
7. IOUT
8. IOUT
STYLE 26:
PIN 1. GND
2. dv/dt
3. ENABLE
4. ILIMIT
5. SOURCE
6. SOURCE
7. SOURCE
8. VCC
STYLE 27:
PIN 1. ILIMIT
2. OVLO
3. UVLO
4. INPUT+
5. SOURCE
6. SOURCE
7. SOURCE
8. DRAIN
STYLE 28:
PIN 1. SW_TO_GND
2. DASIC_OFF
3. DASIC_SW_DET
4. GND
5. V_MON
6. VBULK
7. VBULK
8. VIN
STYLE 29:
PIN 1. BASE, DIE #1
2. EMITTER, #1
3. BASE, #2
4. EMITTER, #2
5. COLLECTOR, #2
6. COLLECTOR, #2
7. COLLECTOR, #1
8. COLLECTOR, #1
STYLE 30:
PIN 1. DRAIN 1
2. DRAIN 1
3. GATE 2
4. SOURCE 2
5. SOURCE 1/DRAIN 2
6. SOURCE 1/DRAIN 2
7. SOURCE 1/DRAIN 2
8. GATE 1
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