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STM32F405xx, STM32F407xx Datasheet

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Datasheet

www.st.com/stm32f4
32-bit Flash MCU, 168 MHz/210 DMIPS, with DSP instructions,
floating point unit and advanced peripherals
STM32 F4 series
High-performance Cortex-M4 MCU
STMicroelectronics
2
STM32 F4 DSC 32-bit Cortex-M4
ST is widening its target applications arena with the STM32 F4 series. Based on the Cortex-M4 core, this series
opens the door to the digital signal controller (DSC) market. This extension to our STM32 product portfolio
offers devices with pin-to-pin and software compatibility with the STM32 F2 series, but with more performance,
DSP capability, a floating point unit, more SRAM, and peripheral improvements such as full duplex I²S, less than
1 µA RTC and 2.44 MSPS ADCs. The ARM Cortex-M4 core features built-in single-cycle multiply-accumulate
(MAC) instructions, optimized SIMD arithmetic and saturating arithmetic instructions. The adaptive real-
time ART AcceleratorTM combined with ST’s 90 nm technology provides linear performance up to 168 MHz,
unleashing the full performance of the core. These features expand the number of addressable applications in
the industrial, consumer and healthcare segments.
The STM32 F4 series includes devices with 512 Kbytes to 1 Mbyte of on-chip Flash memory, and 192 Kbytes of
SRAM, and 15 communication interfaces.
WLCSP (< 4.5 x 4.5 mm), LQFP64, LQFP100, LQFP144, LQFP176 and UFBGA176 packages are available.
Block diagram
2x 16-bit motor control
PWM
Synchronized AC timer
Control
10x 16-bit timers
2x 32-bit timers
System
51/82/114/140 I/Os
RTC/AWU
Power supply
1.2 V regulator
POR/PDR/PVD
Internal RC oscillators
32 kHz + 16 MHz
Clock control
PLL
2x watchdogs
(independent and window)
Cyclic redundancy
check (CRC)
Xtal oscillators
32 kHz + 4 ~26 MHz
SysTick timer
Crypto/hash processor
2
3DES, AES 256
SHA-1, MD5, HMAC
Multi-AHB bus matrix
ART Accelerator
TM
16-channel DMA
True random number
generator (RNG)
ARM Cortex-M4
168 MHz
Nested vector
interrupt
controller (NVIC)
MPU
JTAG/SW debug/ETM
Block diagram
Floating point unit (FPU)
Notes:
1. HS requires an external PHY connected to the ULPI interface
2. Crypto/hash processor on STM32F417 and STM32F415
Analog
3x 12-bit ADC
24 channels / 2.44 MSPS
2-channel 2x 12-bit DAC
Temperature sensor
Up to 1-Mbyte Flash memory
80-byte + 4-Kbyte
backup SRAM
Up to 192-Kbyte SRAM
512 OTP bytes
FSMC/
SRAM/NOR/NAND/CF/
LCD parallel interface
Connectivity
SDIO
3x SPI, 2x I²S, 3x I²C
Camera interface
2x CAN 2.0B
1x USB 2.0 OTG FS/HS1
1x USB 2.0 OTG FS
6x USART
LIN, smartcard, IrDA,
modem control
Ethernet MAC10/100
with IEEE 1588
Key figures
Performance
Coremark score:
363.17 at 168 MHz,
Coremark/MHz: 2.162
Dhrystone score: 210 at
168 MHz
Power consumption
230 µA/MHz at
168 MHz running Coremark
benchmark from Flash
memory (peripherals off)
1.2 V voltage regulator with
power scaling capability
1.7 V4 to 3.6 V VDD
<1 µA typ RTC
High-speed data transfer
7 masters, 8 slaves on the
multi AHB bus matrix
Faster peripherals
USART: 10.5 Mbit/s
SPI: 37.5 Mbit/s
ADC: 2.44 MSPS
Note:
4. 1.7 V available on all packages except the LQFP64
Development tools
As for all STM32 products, a complete development tool offering is available,
including the following dedicated kits.
STM32 F4 Discovery kit (order code: STM32F4DISCOVERY)
STM32 F4 evaluation board (order codes: STM3240G-EVAL and
STM3241G-EVAL3 for crypto support)
STM32 F4 starter kits from IAR and Keil (order codes: STM3240G-SK/IAR and
STM3240G-SK/KEI)
Note: 3. Contact your local ST sales office.
STM32F4DISCOVERY
STM3240G-EVAL
3
Features and benefits
Features Benefits
168 MHz/210 DMIPS Cortex-M4 with single cycle DSP MAC and floating point unit
Boosted execution of control algorithms
More features possible for your applications
Ease of use
Better code efficiency
Faster time to market
Elimination of scaling and saturation
Easier support for meta-language tools
Designed for high performance and ultra fast data transfers
ART Accelerator
32-bit, 7-layer AHB bus matrix with 7 masters and 8 slaves including 2 blocks of SRAM
Multi DMA controllers: 2 general purpose, 1 for USB HS, 1 for Ethernet
One SRAM block dedicated to the core
Performance equivalent to 0-wait execution from Flash
Concurrent execution and data transfers
Simplified resource allocation
Outstanding power efficiency
Ultra-low dynamic power
RTC <1 µA typ in VBAT mode
3.6 V down to 1.7 V1 VDD
Voltage regulator with power scaling capability
Extra flexibility to reduce power consumption for applications
requiring both high processing and low power performance when
running at low voltage or on a rechargeable battery
Maximum integration
Up to 1 Mbyte of on-chip Flash memory, 192 Kbytes of SRAM, reset circuit, internal RCs,
PLLs, WLCSP package available
More features in space constrained applications
Superior and innovative peripherals
Connectivity: camera interface, crypto/hash HW processor, Ethernet MAC10/100 with
IEEE 1588 v2 support, 2 USB OTG (one with HS support),
Audio: dedicated audio PLL and 2 full duplex I²S
Up to 15 communication interfaces (including 6x USART, 3x SPI, 3x I²C, 2x CAN, SDIO)
Analog: 2x 12-bit DACs, 3x 12-bit ADC reaching 7.32 MSPS in interleaved mode
Up to 17 timers: 16 and 32 bits running up to 168 MHz
New possibilities to connect and communicate high speed data
More precision thanks to high resolution
Extensive tools and software solutions
Various IDE, starter kits, libraries, RTOS and stacks, either open source or provided by ST
or 3rd parties, including the ARM CMSIS DSP library optimized for Cortex-M4 instructions
A wide choice within the STM32 ecosystem to develop your
applications
Note: 1. 1.7 V available on all packages except the LQFP64
ART Accelerator™ performance result
Unleashing the full performance of the
core beyond the embedded Flash intrinsic
speed is an art.
Combined with ST’s 90 nm technology,
the ART Accelerator achieves a linear
performance up to 168 MHz, offering
210 DMIPS and 363 Coremark
performance executing from Flash.
The acceleration mechanism is made
possible using a prefetch queue, a branch
cache and a smart arbitration mechanism.
MCUs using less advanced accelerators
or slower embedded Flash memories
will impact exectution performance as
wait states occur.
MCUs using faster Flash but no
branch cache acceleration to achieve
performance usually show higher
power consumption as a result of more
accesses to a power hungry Flash.
STM32 F4 series Competitor F Competitor R
F
CPU
(MHz)
DMIPS
50
100
150
125
75
25
40
20 80 140
60 100 120 160
175
0
200
225
180
STM32F4:
best mix, acceleration and speed
Competitor R: maximum
frequency limitation
Competitor F: Flash access bottleneck
For more information on ST products and solutions, visit www.st.com
© STMicroelectronics - September 2011 - Printed in United Kingdom - All rights reserved
The STMicroelectronics corporate logo is a registered trademark of the STMicroelectronics group of companies
All other names are the property of their respective owners
Device summary
Part number Package
Flash
size
(Kbytes)
Internal
RAM
size
(Kbytes)
Timer functions
ADC DAC
I/Os
(high
current)
Serial
interface
Supply
voltage
(Vcc) (V)
Supply current
(Icc)
Temperature
(°C)
16-bit
(IC/OC/
PWM)
Others
Lowest
power
mode
(µA)
Run
mode
(µA/
MHz)
STM32F405/415: 1x USB OTG (FS/HS
1
), crypto/hash processor
2
STM32F405RG
LQFP64
(10x10)
WLCSP64
1024 192 12x16-bit
(24/24/30) 2x32-bit
timers
(8/8/8),
2x WDG,
RTC,
24-bit
down
counter,
2x16-bit
basic
timers
16x12-bit 2x12-bit 51(51)
3xSPI,
2xI²S, 2xI²C,
3xUSART
(IrDa,
ISO 7816),
3xUART,
1x USB OTG
FS/HS,
2xCAN, SDIO
1.73/1.8
to 3.6 2.5 230
-40 to +85 or
-40 to +105
STM32F415RG²
LQFP64
(10x10)
WLCSP64
1024 192 12x16-bit
(24/24/30) 16x12-bit 2x12-bit 51(51) 1.73/1.8
to 3.6 2.5 230
STM32F405VG LQFP100
(14x14) 1024 192 12x16-bit
(24/24/30) 16x12-bit 2x12-bit 82(82) 1.73/1.8
to 3.6 2.5 230
STM32F415VG² LQFP100
(14x14) 1024 192 12x16-bit
(24/24/30) 16x12-bit 2x12-bit 82(82) 1.73/1.8
to 3.6 2.5 230
STM32F405ZG LQFP144
(20x20)
1024 192 12x16-bit
(24/24/30)
24x12-bit 2x12-bit 114(114) 1.73/1.8
to 3.6
2.5 230
STM32F415ZG² LQFP144
(20x20)
1024 192 12x16-bit
(24/24/30)
24x12-bit 2x12-bit 114(114) 1.73/1.8
to 3.6
2.5 230
STM32F407/417: 2x USB OTG (FS + /HS
1
), camera IF, crypto/hash processor
2
STM32F407IE
UFBGA176
(10x10)
LQFP176
(24x24)
512 192 12x16-bit
(24/24/30)
2x32-bit
timers
(8/8/8),
2 x WDG,
RTC,
24-bit
down
counter,
2x16-bit
basic
timers
24x12-bit 2x12-bit 140(140)
3xSPI,
2xI²S, 2xI²C,
3xUSART
(IrDa,
ISO 7816),
3xUART,
2x USB OTG
FS/HS,
2xCAN,
Ethernet
MAC10/100,
SDIO
1.73/1.8
to 3.6 2.5 230
-40 to +85 or
-40 to +105
STM32F417IE²
UFBGA176
(10x10)
LQFP176
(24x24)
512 192 12x16-bit
(24/24/30) 24x12-bit 2x12-bit 140(140) 1.73/1.8
to 3.6 2.5 230
STM32F407IG
UFBGA176
(10x10)
LQFP176
(24x24)
1024 192 12x16-bit
(24/24/30) 24x12-bit 2x12-bit 140(140) 1.73/1.8
to 3.6 2.5 230
STM32F417IG²
UFBGA176
(10x10)
LQFP176
(24x24)
1024 192 12x16-bit
(24/24/30) 24x12-bit 2x12-bit 140(140) 1.73/1.8
to 3.6 2.5 230
STM32F407VE LQFP100
(14x14) 512 192 12x16-bit
(24/24/30) 16x12-bit 2x12-bit 82(82) 1.73/1.8
to 3.6 2.5 230
STM32F417VE² LQFP100
(14x14)
512 192 12x16-bit
(24/24/30)
16x12-bit 2x12-bit 82(82) 1.73/1.8
to 3.6
2.5 230
STM32F407VG LQFP100
(14x14)
1024 192 12x16-bit
(24/24/30)
16x12-bit 2x12-bit 82(82) 1.73/1.8
to 3.6
2.5 230
STM32F417VG² LQFP100
(14x14) 1024 192 12x16-bit
(24/24/30) 16x12-bit 2x12-bit 82(82) 1.73/1.8
to 3.6 2.5 230
STM32F407ZE LQFP144
(20x20) 512 192 12x16-bit
(24/24/30) 2x12-bit 2x12-bit 114(114) 1.73/1.8
to 3.6 2.5 230
STM32F417ZE2LQFP144
(20x20)
512 192 12x16-bit
(24/24/30)
2x12-bit 2x12-bit 114(114) 1.73/1.8
to 3.6
2.5 230
STM32F407ZG LQFP144
(20x20)
1024 192 12x16-bit
(24/24/30)
2x12-bit 2x12-bit 114(114) 1.73/1.8
to 3.6
2.5 230
STM32F417ZG² LQFP144
(20x20) 1024 192 12x16-bit
(24/24/30) 2x12-bit 2x12-bit 114(114) 1.73/1.8
to 3.6 2.5 230
Notes:
1. HS requires an external PHY connected to ULPI interface
2. Crypto/hash processor on STM32F417 and STM32F415
3. Available on all packages except LQFP64. 1.7V requires external reset circuitry.
 
Order code: BRSTM32F40911

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